Abstract
As density and size of VLSI chips still increase, the power consumption has become an important concern. The CMOS circuit with nominal supply voltage operating in high frequency consumes more power. The fashionable applications like mobile systems, sensing element networks need low power consumptions. In subthreshold logic, the circuit operates with voltage which is below transistor threshold voltage and it utilizes the subthreshold current as operating current. Adiabatic logic can even enforce in subthreshold regime to cut back dynamic power consumption considerably. ALU is one in all basic block within the low-cost electronic equipment. It consumes heap of power by continuous computation. So, it’s important to cut back power consumption for higher performance. During this work, Arithmetic and Logic Unit is designed by subthreshold adiabatic logic and standard CMOS logic. The performance of ALU designed by subthreshold adiabatic logic is compared with standard CMOS logic. In order to simulate the circuits, Cadence virtuoso environment is used for 180 nm technology.
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Deshpande, A., Vigneswaran, T. (2018). Design of Arithmetic and Logic Unit (ALU) Using Subthreshold Adiabatic Logic for Low-Power Application. In: Li, J., Sankar, A., Beulet, P. (eds) VLSI Design: Circuits, Systems and Applications . Lecture Notes in Electrical Engineering, vol 469. Springer, Singapore. https://doi.org/10.1007/978-981-10-7251-2_22
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DOI: https://doi.org/10.1007/978-981-10-7251-2_22
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