Abstract
As an important part of the computer organization and architecture (COA) course, the experiment teaching is generally about the computer system design. Students use the hardware description languages (HDLs) tools to implement the computer system on the Field Programmable Gate Array (FPGA) based platform. However, the HDLs tools are made for expert hardware engineers and the computer system is a very complex hardware project. It is hard for students to implement their computer system design in the limited lab hours. How to help students get the design validation and find the failure root is important in COA experiment teaching. To this end, an analysis and validation toolkit which is special for COA experiment teaching is designed. For two main steps of FPGA-based hardware design, waveform simulation and on-board testing, two packages were implemented for them respectively. The comparison results of using and not using our toolkit show it improves the effectiveness of experiment teaching greatly.
Supported by 2019 Heilongjiang province higher education and teaching research reformation fund (No. SJGY20190214) and Harbin Institute of Technology “Smart Base” project.
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References
ACM, IEEE: Computer engineering curricula (2016). https://dx.doi.org/10.1145/3025098. Accessed Mar 2019
Aydogan, T., Ergun, S.: A study to determine the contribution made by concept maps to a computer architecture and organization course. Eur. J. Contemp. Educ. 15(1), 76–85 (2016)
Brailas, A., Koskinas, K., Alexias, G.: Teaching to emerge: toward a bottom-up pedagogy. Cogent Educ. 4(1), 137–145 (2017)
Cummings, R., Phillips, R., Tilbrook, R., Lowe, K.: Middle-out approaches to reform of university teaching and learning: champions striding between the top-down and bottom-up approaches. Int. Rev. Res. Open Distrib. Learn. 6(1) (2005)
Digilent: Nexys 3 spartan-6 fpga trainer board (2021). https://store.digilentinc.com/nexys-3-spartan-6-fpga-trainer-board-limited-time-see-nexys4-ddr/. Accessed Mar 2021
Gao, Z., Lu, H., Guo, H., Luo, Y., Xie, Y., Fang, Q.: An analogous teaching method for computer organization course design. In: 2016 8th International Conference on Information Technology in Medicine and Education (ITME), pp. 414–418 (2016). https://doi.org/10.1109/ITME.2016.0099
Harris, S.L., et al.: MIPSfpga: using a commercial MIPS soft-core in computer architecture education. IET Circ. Dev. Syst. 11(4), 283–291 (2017). https://doi.org/10.1049/iet-cds.2016.0383
Intel: Quartus prime software suite (2021). https://www.intel.com/content/www/us/en/software/programmable/quartus-prime/overview.html?wapkw=%20Quartus. Accessed Mar 2021
Kehagias, D.: A survey of assignments in undergraduate computer architecture courses. iJET 11(6), 68–72 (2016)
McGrew, T., Schonauer, E., Jamieson, P.: Framework and tools for undergraduates designing RISC-V processors on an FPGA in computer architecture education. In: 2019 International Conference on Computational Science and Computational Intelligence (CSCI), pp. 778–781 (2019). https://doi.org/10.1109/CSCI49370.2019.00148
Palnitkar, S.: Verilog HDL: a guide to digital design and synthesis. Verilog HDL: a guide to digital design and synthesis (1996)
Patterson, D.A., Hennessy, J.L.: Computer Organization and Design, Fifth Edition: The Hardware/Software Interface. The Hardware/Software Interface, Computer Organization and Design, Fifth Edition (2013)
Qiao, B.Y., Zhao, X.G., Yuan, Y.: Teaching reform practice of computer architecture. Educ. Teach. Forum 51, 85–86 (2019)
Qin, G., Hu, Y., Huang, L., Guo, Y.: Design and performance analysis on static and dynamic pipelined CPU in course experiment of computer architecture. In: 2018 13th International Conference on Computer Science Education (ICCSE), pp. 111–116 (2018). https://doi.org/10.1109/ICCSE.2018.8468729
Shu, Y., et al.: Bottom-up teaching reformation for the undergraduate course of computer organization and architecture. In: Mao, R., Wang, H., Xie, X., Lu, Z. (eds.) ICPCSEE 2019. CCIS, vol. 1059, pp. 303–312. Springer, Singapore (2019). https://doi.org/10.1007/978-981-15-0121-0_23
Wang, L., Yu, Z., Zhang, D., Qin, G.: Research on multi-cycle CPU design method of computer organization principle experiment. In: 2018 13th International Conference on Computer Science Education (ICCSE), pp. 760–765 (2018). https://doi.org/10.1109/ICCSE.2018.8468694
Xilinx: Vivado design suite (2021). https://www.xilinx.com/products/design-tools/vivado.html. Accessed Mar 2021
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Shu, Y. et al. (2021). An Analysis and Validation Toolkit to Support the Undergraduate Course of Computer Organization and Architecture. In: Zeng, J., Qin, P., Jing, W., Song, X., Lu, Z. (eds) Data Science. ICPCSEE 2021. Communications in Computer and Information Science, vol 1452. Springer, Singapore. https://doi.org/10.1007/978-981-16-5943-0_38
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