Abstract
A novel process algebra is presented; algebraic expressions specify delay-insensitive circuits in terms of voltage-level transitions on wires. The algebraic laws make it possible to specify circuits concisely and facilitate the verification of designs. Individual components can be composed into circuits in which signals along internal wires are hidden from the environment.
This algebraic approach has been applied to the design of non-blocking arbiters. Our designs have subsequently been checked by automatic verifiers, which had to examine approximately 600 states.
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Josephs, M.B., Udding, J.T. (1990). Delay-insensitive circuits: An algebraic approach to their design. In: Baeten, J.C.M., Klop, J.W. (eds) CONCUR '90 Theories of Concurrency: Unification and Extension. CONCUR 1990. Lecture Notes in Computer Science, vol 458. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0039070
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DOI: https://doi.org/10.1007/BFb0039070
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