Skip to main content

General purpose computer architecture based on fully programmable logic

  • Conference paper
  • First Online:
Evolvable Systems: From Biology to Hardware (ICES 1998)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1478))

Included in the following conference series:

Abstract

We propose a new general-purpose computer architecture based on programmable logic. It consists of a dual-structured array of cells accommodating a fixed “built-in part” and a freely programmable “plastic part”. We call this composition the “Plastic Cell Architecture” (PCA). The built-in part with its fully connective two-dimensional mesh structure serves as a communication platform based on the cellular automata model. It is responsible for the configuration of the plastic part which implements a sea of logic gates similar to programmable devices (FPGA). The key point of our architecture is dynamic, distributed object instantiation during runtime. An object can encapsulate data and/or behavior and communicates with other objects through a unique type of message passing implemented in hardware. Thus, PCA combines the merits of fine grained, high performance hardware implementation and the dynamic memory allocation capabilities of software.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Y. Nakamura, K. Oguri and A. Nagoya: “Synthesis From Pure Behavioral Descriptions,” High-Level VLSI Synthesis, Edited by R. Camposano and W. Wolf, Kluwer Academic Publishers, pp.205–229, June, 1991 http://www.kecl.ntt.co.jp/car/parthe/

    Google Scholar 

  2. R. Hartenstein, J. Becker, M. Herz and U. Nageldinger: “Parallelization in Co-Compilation for Configurable Accelerators,” in Proc. of Asia and South Pacific Design Automation Conf. (ASP-DAC’98), pp. 23–33, February, 1998

    Google Scholar 

  3. K. Nagami, K. Oguri, T. Shiozawa, H. Ito and R. Konishi: “Plastic Cell Architecture: Towards Reconfigurable Computing for General-Purpose,” in Preliminary Proc. of IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM’98), April, 1998

    Google Scholar 

  4. H. Ito, K. Oguri, K. Nagami, R. Konishi and T. Shiozawa: “Plastic Cell Architecture for General Purpose Reconfigurable Computing,” to appear in Proc. of IEEE International Workshop on Rapid System Prototying (RSP’98), June, 1998

    Google Scholar 

  5. T. Shiozawa, K. Oguri, K. Nagami, H. Ito, R. Konishi and N. Imlig: “ A Hardware Implementation of Constraint Satisfaction Problem Based on New Reconfigurable LSI Architecture,” to appear in Proc. of International Workshop on Field Programmable Logic and Applications (FPL’98), August, 1998

    Google Scholar 

  6. H. Schmit: “Incremental Reconfiguration for Pipelined Applications,” in Proc. IEEE Workshop on FPGAs for Custom Computing Machines, pp. 47–55, April, 1997

    Google Scholar 

  7. W. Luk, N. Shirazi and P. Y.K. Cheung: “Compilation Tools for Run-Time Reconfigurable Designs,” in Proc. IEEE Workshop on FPGAs for Custom Computing Machines, pp. 56–65, April, 1997

    Google Scholar 

  8. J. Burns, A. Donlin, J. Hogg, S. Singh and M. Wit: “A Dynamic Reconfiguration Run-Time System,” in Proc. IEEE Workshop on FPGAs for Custom Computing Machines, pp. 66–75, April, 1997

    Google Scholar 

  9. R. A. Bittner, Jr and P. M. Athanas: “Computing Kernels Implemented with a Wormhole RTR CCM,” in Proc. IEEE Workshop on FPGAs for Custom Computing Machines, pp. 98–105, April, 1997

    Google Scholar 

  10. P. Nussbaum, P. Marchal and Ch. Piguet: “Functional Organisms Growing on Silicon,” in Proc. of The First International Conference on Evolvable Systems: From Biology to Hardware (ICES96), vol. 1259 of Lecture Notes in Computer Science, Springer Verlag, pp. 139–151, October, 1996

    Google Scholar 

  11. E. Lemoine and D. Merceron: “Run Time Reconfiguration of FPGAs for Scanning Geomic DataBases,” in Proc. FCCM95, P. Athanas and K.L. Pocek (eds.), IEEE Computer Society Press, pp. 85–89, 1995

    Google Scholar 

  12. S. Y. Kung: “VLSI Array Processors,” Prentice Hall, ISBN 0-13-942749-X, 1988

    Google Scholar 

  13. P. Denyer and D. Renshaw: “VLSI Signal Processing: A Bit-Serial Approach,” Addison-Wesley Publishing Company, 1985

    Google Scholar 

  14. H. Eberle, S. Gehring, S. Ludwig, and N. Wirth: “Tools for Digital Circuit Design using FPGAs,” Departement Informatik, Institut fuer Computersysteme, ETH Zurich, 1994 http://www.es.inf.ethz.ch/cs/group/wirth/proj ects/cad_tools/

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Moshe Sipper Daniel Mange Andrés Pérez-Uribe

Rights and permissions

Reprints and permissions

Copyright information

© 1998 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Oguri, K., Imlig, N., Ito, H., Nagami, K., Konishi, R., Shiozawa, T. (1998). General purpose computer architecture based on fully programmable logic. In: Sipper, M., Mange, D., Pérez-Uribe, A. (eds) Evolvable Systems: From Biology to Hardware. ICES 1998. Lecture Notes in Computer Science, vol 1478. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0057634

Download citation

  • DOI: https://doi.org/10.1007/BFb0057634

  • Published:

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-64954-0

  • Online ISBN: 978-3-540-49916-9

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics