Years and Authors of Summarized Original Work
2012; Haitong Tian
Problem Definition
As the feature size keeps shrinking, there are increasing difficulties to print circuit patterns using single litho exposure. For 32/22 nm technology nodes, double patterning lithography (DPL) is one of the most promising techniques for the industry. In DPL, a layout is decomposed into two masks, where each feature in the layout is uniquely assigned to one of the masks. By using two masks which go through two separate exposures, better printing resolution can be achieved. For 14/10 nm technology node and beyond, triple patterning lithography (TPL) is one technique to obtain qualified printing results. In TPL, a layout is decomposed into three masks which further enhance the printing resolution. Currently, DPL and TPL are the two most studied multiple patterning techniques for advanced technology nodes [1–7]. Multiple patterning techniques such as quadruple patterning lithography and beyond usually are...
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Recommended Reading
Kahng AB, Xu X, Park C-H, Yao H (2008) Layout decomposition for double patterning lithography. In: IEEE/ACM international conference on computer-aided design, San Jose
Yuan K, Yang J-S, Pan DZ (2010) Double patterning layout decomposition for simultaneous conflict and stitch minimization. IEEE Trans Comput-Aided Des Integr Circuits Syst 29:185–196
Yu B, Yuan K, Zhang B, Ding D, Pan DZ (2011) Layout decomposition for triple patterning lithography. In: IEEE/ACM international conference on computer-aided design, San Jose
Tian H, Zhang H, Ma Q, Xiao Z, Wong MDF (2012) A polynomial time triple patterning algorithm for cell based row-structure layout. In: IEEE/ACM international conference on computer-aided design, San Jose
Fang S-Y, Chang Y-W, Chen W-Y (2012) A novel layout decomposition algorithm for triple patterning lithography. In: IEEE/ACM proceedings of design automation conference, San Francisco
Kuang J, Yang EFY (2013) An efficient layout decomposition approach for triple patterning lithography. In: IEEE/ACM proceedings of design automation conference, Austin
Zhang Y, Luk W-S, Zhou H, Yan C, Zeng X (2013) Layout decomposition with pairwise coloring for multiple patterning lithography. In: IEEE/ACM international conference on computer-aided design, San Jose
Yu B, Lin Y-H, Luk-Pat G, Ding D, Lucas K, Pan DZ (2013) A high-performance triple patterning layout decomposer with balanced density. In: IEEE/ACM international conference on computer-aided design, San Jose
Tian H, Zhang H, Du Y, Xiao Z, Wong MDF (2013) Constrained pattern assignment for standard cell based triple patterning lithography. In: IEEE/ACM international conference on computer-aided design, San Jose
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© 2016 Springer Science+Business Media New York
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Tian, H., Wong, M.D.F. (2016). Layout Decomposition for Multiple Patterning. In: Kao, MY. (eds) Encyclopedia of Algorithms. Springer, New York, NY. https://doi.org/10.1007/978-1-4939-2864-4_745
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DOI: https://doi.org/10.1007/978-1-4939-2864-4_745
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