Skip to main content

On the connection between hexagonal and unidirectional rectangular systolic arrays

  • Conference paper
  • First Online:
VLSI Algorithms and Architectures (AWOC 1986)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 227))

Included in the following conference series:

Abstract

We define a simple transformation between systolic algorithms with hexagonal and with rectangular processor arrays. Using this transformation we can establish a direct correspondence between two independently developed systolic arrays for solving the algebraic path problem (matrix inversion, shortest paths in a network, transitive closure of a relation). Then we derive a new hexagonal array for solving a certain type of dynamic programming recursion that arises for example in context-free language recognition, in the construction of optimal binary search trees, or in the computation of an optimal sequence of multiplications for the evaluation of an associative product.

In general, the type of transformation used here allows arbitrary systolic arrays to be transformed into unidirectional ones, which are preferable from the points of view of fault tolerance, two-level pipelining, and algorithm partitioning.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  • Culik II, K., and I. Fris /1984/: Topological transformations as a tool in the design of systolic networks. research report CS-84-11, University of Waterloo, Department of Computer Science, April 1984.

    Google Scholar 

  • Culik II, K., and Sheng Yu /1985/: Translation of systolic algorithms between systems of different topology in: Proc. 1985 Int. Conf. Parallel Processing (D. Degroot, ed.). pp.756–763.

    Google Scholar 

  • Guibas, L. J., H. T. Kung, and C. D. Thompson /1979/: Direct VLSI implementation of combinatorial algorithms. Proc. CalTech Conference on VLSI. California Institute of Technology, January 1979, Architecture session, pp. 509–525.

    Google Scholar 

  • Knuth, D. E. /1973/: The art of computer programming, vol. 3: sorting and searching. Addison-Wesley

    Google Scholar 

  • Kung, H. T. /1980/: The structure of parallel algorithms In: Advances in Computers 19, pp. 65–112, Academic Press 1980.

    Google Scholar 

  • Kung, H. T. /1982/: Why systolic architectures? Computer 15 (1) (special issue on highly parallel computing), 37–46.

    Google Scholar 

  • Kung, H. T., and Monica S. Lam /1983/: Fault-tolerant VLSI systolic arrays and two-level pipelining. in: Real Time Signal Processing VI (K. Bromley, ed.), sessions on real-time signal processing at the 27th annual technical symposion of the Society of Photo-Optical Instrumentation Engineers; Proc. Soc. Photo-Optical Instrumentation Engineers, vol. 431, pp. 143–158.

    Google Scholar 

  • Kung, H. T., and Monica S. Lam /1984a/: Fault-tolerance and two-level pipelining in VLSI systolic arrays. in: Proc. 6th conf. on advanced research in VLSI (P. Penfield jr., ed.), Massachusetts Institute of Technology, January 1984, pp. 74–83.

    Google Scholar 

  • Kung, H. T., and Monica S. Lam /1984b/: Wafer-scale integration and two-level pipelined implementations of systolic arrays. Journal of Parallel and Distributed Processing 1 (1), 32–63.

    Google Scholar 

  • Kung, H. T., and C. E. Leiserson /1978/: Systolic arrays (for VLSI). In: Sparse Matrix Proceedings 1978 (I. S. Duff and G. W. Stewart, eds.), Knoxville, Tenn., pp. 256–282. A slightly different version has appeared as section 8.3 of the book: Mead, C. A., and L. A. Conway: Introduction to VLSI systems, Addison-Wesley 1979.

    Google Scholar 

  • Leiserson, C. E., and J. B. Saxe /1981/: Optimizing synchronous systems. In: Proceedings of the 22nd annual symposium on the foundations of computer science, pp. 23–26. IEEE Computer Society, October 1981; (final version in Journal of VLSI and Computer Systems).

    Google Scholar 

  • Moldovan, D. I., and J. A. B. Fortes /1986/: Partitioning and mapping algorithms into fixed size systolic arrays. IEEE Trans. Computers C-35, 1–12.

    Google Scholar 

  • Robert, Y., and D. Trystram /1986/: An orthogonal systolic array for the algebraic path problem. Research report 553, July 1985, IMAG, Laboratoire TIM3, Grenoble; to appear in Computing.

    Google Scholar 

  • Rote, G. /1985/: A systolic array algorithm for the algebraic path problem (shortest paths; matrix inversion). Computing 34, 191–219.

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Filia Makedon Kurt Mehlhorn T. Papatheodorou P. Spirakis

Rights and permissions

Reprints and permissions

Copyright information

© 1986 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Rote, G. (1986). On the connection between hexagonal and unidirectional rectangular systolic arrays. In: Makedon, F., Mehlhorn, K., Papatheodorou, T., Spirakis, P. (eds) VLSI Algorithms and Architectures. AWOC 1986. Lecture Notes in Computer Science, vol 227. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-16766-8_7

Download citation

  • DOI: https://doi.org/10.1007/3-540-16766-8_7

  • Published:

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-16766-2

  • Online ISBN: 978-3-540-38746-6

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics