Abstract
In this paper, we extend Jenq [1]'s performance analysis method of single-buffered banyan networks, to be applicable for the multi-buffered packet-switching interconnection networks in multiprocessor systems. Earlier analyses on the buffered interconnection network performances assumed either single or infinite buffers at each input (output) port of a switch. As far as the multi-buffered interconnection network is concerned, only some simulation results for the delta networks have been known [2].
We first model the performance of the single-buffered delta networks using the state transition diagram of a buffer. We then extend the model to account for the multiple buffers.
The results of the multi-buffered delta networks obtained through this analytic approach are compared with the known simulation results. We also show the state equations for the multi-buffered data manipulator networks to demonstrate the generality of the model.
This is a preview of subscription content, log in via an institution to check access.
Preview
Unable to display preview. Download preview PDF.
References
Jenq, Y.C., “Performance Analysis of a Packet Switch Based on Single-Buffered Banyan Network”, IEEE Journal on Selected Areas in Communications,Vol. SAC-30, No. 6, December 1983, pp. 1014–1021.
Dias, D.M. and Jump, J.R., “Analysis and Simulation of Buffered Delta Networks”, IEEE Transactions on Computers,Vol. C-30, No. 4, April 1981, pp. 273–282.
Chin, C.Y. and Hwang, K., “Packet Switching Networks for Multiprocessors and Data Flow Computers”, IEEE Transactions on Computers,Vol. C-33, No. 11, November 1984, pp. 991–1003.
Turner, J.S., “Design of an Integrated Services Packet Network”, IEEE Journal on Selected Areas in Communications,Vol. SAC-4, No. 8, November 1986, pp. 1373–1380.
Turner, J.S., “Design of a Broadcast Packet Switching Network”, Proc. of IEEE INFOCOM, April 1986, pp. 667–675.
Patel, J.H., “Performance of Processor-Memory Interconnections for Multiprocessors”, IEEE Transactions on Computers,Vol. C-30, No. 10, October 1981, pp. 771–780.
Kruskal, C.P. and Snir, M., “The Performance of Multistage Interconnection Networks for Multiprocessors”, IEEE Transactions on Computers,Vol. C-32, No. 12, December 1983, pp. 1091–1098
Lee M. and Wu, C.L., “Performance Analysis of Circuit Switching Baseline Interconnection Networks”, Proc. 11th Annu. Comput. Arch. Conf., 1984, pp. 82–90.
Kumar, M. and Jump, J.R., “Performance of Unbuffered Shuffle-Exchange Networks”, IEEE Transactions on Computers,Vol. C-35, No. 6, June 1986, pp. 573–578.
Varma, A. and Raghavendra, C.S., “Performance Analysis of a Redundant-Path Interconnection Network”, Proc. of 1985 Int. Conf. on Parallel Processing, 1985, pp. 474–479.
Dias, D.M. and Jump, J.R., “Packet Switching Interconnection Networks for Module Systems”, IEEE Computer,Vol. 14, No. 12, December 1981, pp. 43–53.
Bubenik, R.G. and Turner, J.S., “Performance of a Broadcast Packet Switch”, Tech. Report WUCS-86-10, Washington University, Computer Science Department, June 1986.
Yoon, H., Lee, K.Y., and Liu, M.T., “Performance Analysis and Comparison of Packet Switching Interconnection Networks”, Proc. of 1987 Int. Conf. on Parallel Processing, August 1987.
Feng, T., “Data Manipulating Functions in Parallel Processors and their Implementations”, IEEE Transactions on Computers,Vol. C-30, No. 3, March 1974, pp. 309–318.
Siegel, H.J., “Interconnection Networks for SIMD Machines”, IEEE Computer,Vol. 12, June 1979, pp. 57–65.
Smith,S.D., Siegel,H.J., McMillen,R.J., and Adams III,G.B., “Use of the Augmented Data Manipulator Multistage Network for SIMD Machines”, International Conference on Parallel Processing, August 1980, pp. 75–78.
Parker, D.S. and Raghavendra, C.S., “The Gamma Network”, IEEE Transactions on Computers,Vol. C-33, No. 4, April 1984, pp. 367–373.
Author information
Authors and Affiliations
Editor information
Rights and permissions
Copyright information
© 1988 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Yoon, H., Lee, K.Y., Liu, M.T. (1988). Performance analysis of multi-buffered packet-switching networks in multiprocessor systems. In: Houstis, E.N., Papatheodorou, T.S., Polychronopoulos, C.D. (eds) Supercomputing. ICS 1987. Lecture Notes in Computer Science, vol 297. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-18991-2_9
Download citation
DOI: https://doi.org/10.1007/3-540-18991-2_9
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-18991-6
Online ISBN: 978-3-540-38888-3
eBook Packages: Springer Book Archive