Abstract
System and processor architectures depend on changes in technology. Looking ahead as die density and speed increase, power consumption and on chip interconnection delay become increasingly important in defining architecture tradeoffs. While technology improvements enable increasingly complex processor implementations, there are physical and program behavior limits to the usefulness of this complexity at the processor level. The architecture emphasis then shifts to the system: integrating controllers, signal processors, and other components with the processor to achieve enhanced system performance. In dealing with these elements, adaptability or reconfiguration is essential for optimizing system performance in a changing application environment. A hierarchy of adaptation is proposed based on flexible processor architectures, traditional FPL, and a new coarse grain adaptive arithmetic cell. The adaptive arithmetic cell offers high-performance arithmetic operations while providing computational flexibility. The proposed cell offers efficient and dynamic reconfiguration of the arithmetic units. Hybrid fine and coarse grain techniques may offer the best path to the continued evolution of the processor-based system.
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Flynn, M.J., Liddicoat, A.A. (2001). Technology Trends and Adaptive Computing. In: Brebner, G., Woods, R. (eds) Field-Programmable Logic and Applications. FPL 2001. Lecture Notes in Computer Science, vol 2147. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44687-7_1
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DOI: https://doi.org/10.1007/3-540-44687-7_1
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