Abstract
This paper presents a performance analysis of a new directory based cache coherence protocol. We compare the fully mapped centralized directory protocol with a distributed directory protocol developed by us. The distributed directory protocol is based on a linked list of caches and is more scalable in terms of cost and performance. It does not require the network to preserve the order of messages and allows adaptive routing so that network performance may be more robust. Simulation results show that the distributed directory protocol has better performance than the centralized directory protocol for the benchmarks we have analyzed.
This is a preview of subscription content, log in via an institution to check access.
Preview
Unable to display preview. Download preview PDF.
References
Anant Agarwal, Richard Simoni, John Hennessy, and Mark Horowitz. An evaluation of directory schemes for cache coherence. In Proceedings of the 15th International Symposium on Computer Architecture, pages 281–289, 1988.
James Archibald and Jean-Loup Baer. Cache coherence protocols: Evaluation using a multiprocessor simulation model. ACM Transactions on Computer Systems, 4(4):274–298, November 1986.
W.C. Brantley, K.P. McAuliffe, and J. Weiss. RP3 processor-memory element. In Proceedings of the 1985 International Conference on Parallel Processing, pages 782–789, 1985.
Lucien M. Censier and Paul Feautrier. A new solution to coherence problems in multicache systems. IEEE Transactions on Computers, c-27(12):1112–1118, December 1978.
William J. Dally. Virtual-channel flow control. In Proceedings of the 17th International Symposium on Computer Architecture, pages 60–68, 1990.
Michel Dubois and Christoph Scheurich. Memory access dependencies in sharedmemory multiprocessors. IEEE Transactions on Software Engineering, 16(6):660–673, June 1990.
Anoop Gupta, Wolf-Dietrich Weber, and Todd Mowry. Reducing memory and traffic requirements for scalable directory-based cache coherence schemes. In Proceedings of the 1990 International Conference on Parallel Processing, 1990.
David V. James, Anthony T. Laundrie, Stein Gjessing, and Gurinder S. Sohi. Scalable coherent interface. IEEE Computer, 23(6):74–77, June 1990.
Boris Lubachevsky. Synchronization barrier and related tools for shared memory parallel programming. In 1989 International Conference on Parallel Processing, pages 175–179, 1989. Vol II.
Manu Thapar and Bruce Delagi. Cache coherence for large scale shared memory multiprocessors. In Proceedings of the 1990 ACM Symposium on Parallel Algorithms and Architectures, 1990.
Manu Thapar and Bruce Delagi. Stanford distributed-directory protocol. IEEE Computer, 23(6):78–80, June 1990.
Manu Thapar and Bruce Delagi. Simulation of cache coherence protocols for shared memory multiprocessors. Technical Report KSL-91-01, Stanford University, January 1991. To appear in International Journal of Computer Simulation.
Wolf-Dietrich Weber and Anoop Gupta. Analysis of cache invalidation patterns in multiprocessors. In Proceedings of the Third International Conference on Architectural Support for Programming Languages and Operating Systems, pages 243–256, 1989.
Author information
Authors and Affiliations
Editor information
Rights and permissions
Copyright information
© 1992 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Thapar, M., Delagi, B.A., Flynn, M.J. (1992). Scalable cache coherence for shared memory multiprocessors. In: Zima, H.P. (eds) Parallel Computation. ACPC 1991. Lecture Notes in Computer Science, vol 591. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-55437-8_67
Download citation
DOI: https://doi.org/10.1007/3-540-55437-8_67
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-55437-0
Online ISBN: 978-3-540-47073-1
eBook Packages: Springer Book Archive