Abstract
HardWire LCAs are architecturally-equivalent, mask-programmed versions of Xilinx FPGA devices, where the programming elements have been replaced with fixed metal connections. Built-in scan test logic used in conjunction with automatic test vector generation software results in 100% fault coverage. Completed FPGA database files are used to generate HardWire LCA masks and test programs, ensuring compatibility with the corresponding programmable device and minimizing the engineering resources required for the conversion.
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© 1994 Springer-Verlag Berlin Heidelberg
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Fawcett, B.K., Sawyer, N., Williams, T. (1994). Hardwire: A risk-free FPGA-to-ASIC migration path. In: Hartenstein, R.W., ServÃt, M.Z. (eds) Field-Programmable Logic Architectures, Synthesis and Applications. FPL 1994. Lecture Notes in Computer Science, vol 849. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-58419-6_100
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DOI: https://doi.org/10.1007/3-540-58419-6_100
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Print ISBN: 978-3-540-58419-3
Online ISBN: 978-3-540-48783-8
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