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Reduction of Parasitical Power Dissipation

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Low-Power Deep Sub-Micron CMOS Logic

Abstract

In chapter 3 the parasitical power dissipation, consisting of leakage power and short-circuit power, has been discussed. The parasitical power is dissipated without attributing to the actual changes of the internal circuit states. In this chapter solutions to reduce the leakage power and the short-circuit power will be discussed in section 5.1 and 5.2, respectively. In battery operated applications power dissipation caused by weak-inversion currents forms a large part of the parasitical power dissipation. Therefore, the last section will elaborate on the need for weak-inversion current reduction techniques.

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© 2004 Kluwer Academic Publishers, Boston

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van der Meer, P.R., van Staveren, A., van Roermund, A.H.M. (2004). Reduction of Parasitical Power Dissipation. In: Low-Power Deep Sub-Micron CMOS Logic. The Kluwer International Series in Engineering and Computer Science, vol 841. Springer, Boston, MA. https://doi.org/10.1007/978-1-4020-2849-6_5

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  • DOI: https://doi.org/10.1007/978-1-4020-2849-6_5

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4757-1057-1

  • Online ISBN: 978-1-4020-2849-6

  • eBook Packages: Springer Book Archive

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