Three analog functional blocks incorporating numerous architecture and circuit level innovations have been designed, laid out, fabricated in standard a 130 nm digital CMOS process and successfully tested. This chapter makes conclusions that apply to the entire book, while avoiding repeating conclusions specific to each project which can be found in the “Summary” section of each previous chapter.
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© 2008 Springer Science + Business Media B.V
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(2008). Conclusions and Future Directions. In: Low-Power High-Speed ADCs for Nanometer CMOS Integration. Analog Circuits and Signal Processing Series. Springer, Dordrecht. https://doi.org/10.1007/978-1-4020-8450-8_5
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DOI: https://doi.org/10.1007/978-1-4020-8450-8_5
Publisher Name: Springer, Dordrecht
Print ISBN: 978-1-4020-8449-2
Online ISBN: 978-1-4020-8450-8
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