Abstract
Reliability of the flip-chip packages is highly dependent on the properties of the constituent components and the interfaces formed among them. The relative mechanical compliances and thermal mismatch between the silicon chip, the underfill material and the package substrate (organic or inorganic based) are particularly important to the design and performance the package. Strong, thermo-mechanical, Chip–Packaging Interaction (CPI) can cause chip cracking, solder bump cracking, package substrate trace cracking, delamination of Interlayer Dielectrics (ILD) of the silicon chip, delamination of underfill encapsulation, and problems associated with the board-level interconnection when the package is assembled to a printed circuit board (PCB). These problems became more severe as we migrate to lead-free packaging materials for the leading silicon technology nodes such as 32 and 28nm nodes where low-k and extreme low-k ILD materials are widely used. In addition to the thermo-mechanical stresses, moisture absorption in packaging materials especially at the critical interfaces, electrical current, manufacturing defects can also be the drivers for some the failure modes.
In this Chapter attention has been focused on reliability of flip-chip packages especially those with Cu/low-k chips. Combined experimental and modeling methods were used to investigate the thermo-mechanical behavior and failure mechanisms controlling the package reliability. Thermal deformation in flip-chip package assembly was first studied for minimizing the chip-substrate thermo-mechanical coupling. Thermo-mechanical response of the package was measured and analyzed using high-resolution moiré interferometry, analytical and numerical modeling techniques. Four-point bending test was also used to characterize interfacial fracture energy for the critical interface between die passivation and underfill material. The experiments and modeling were correlated with the JEDEC standard component-level reliability testing results. The combined experimental and numerical analysis provided a systemic approach for reliability assessment, package materials selection. It also demonstrated that significantly improved reliability of the flip-chip PBGA packages can be achieved by controlling thermo-mechanical coupling of the silicon die and the package, and by enhancing various important interfaces within the package.
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Li, L., Ma, H. (2013). Thermo-mechanical Reliability in Flip-Chip Packages. In: Tong, HM., Lai, YS., Wong, C. (eds) Advanced Flip Chip Packaging. Springer, Boston, MA. https://doi.org/10.1007/978-1-4419-5768-9_10
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DOI: https://doi.org/10.1007/978-1-4419-5768-9_10
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