Abstract
In this chapter, two-level memory hierarchies are defined and measurements are presented and analyzed for sequential Prolog architectures. The first level consists of a local memory. The second level consists of an interleaved main memory. Both traditional local memory models, as well as models suited specifically to the Prolog architectures previously introduced, are examined. Queueing models are used to determine the main memory interleaving required to support the local memory configurations. In the next chapter, these memory hierarchy designs are extended to multiprocessor systems.
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© 1988 Kluwer Academic Publishers
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Tick, E. (1988). Uniprocessor Memory Organizations. In: Memory Performance of Prolog Architectures. The Kluwer International Series in Engineering and Computer Science, vol 40. Springer, Boston, MA. https://doi.org/10.1007/978-1-4613-2017-3_4
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DOI: https://doi.org/10.1007/978-1-4613-2017-3_4
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4612-9202-9
Online ISBN: 978-1-4613-2017-3
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