Abstract
High-sigma IC designs are inherently difficult to create and verify. This chapter reviews various approaches for high-sigma analysis. It then describes High-Sigma Monte Carlo (HSMC), which is a high-sigma analysis approach that is fast, accurate, scalable, and verifiable. This chapter presents example results for representative high-sigma designs, revealing some of the key traits that make the HSMC technology effective. It describes how to extract full PDFs from −6 to +6 sigma, for application to statistical system-level analysis (e.g. for memory arrays). Finally, it presents industrial design examples.
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Notes
- 1.
Where a failure is either failing a spec, or failing to simulate which also implies failing spec.
- 2.
SNM = static noise margin.
- 3.
Perceptive readers may see that a similar optimization problem exists in importance sampling (IS); and that the spherical sampling phase bears resemblance to the IS technique (Qazi et al. 2010). However, the problem for HSMC is easier than IS, because as Sect. 5.4.1 describes, HSMC only needs these points to influence its ordering of generated MC samples, rather than IS needing to settle on the choice of sampling region(s).
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McConaghy, T., Breen, K., Dyck, J., Gupta, A. (2013). High-Sigma Verification and Design. In: Variation-Aware Design of Custom Integrated Circuits: A Hands-on Field Guide. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-2269-3_5
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