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Abstract

The design of a programmable analogue pulse width modulation synapse is described for use in pulse-firing neural networks. Results from working VLSI devices are presented. A scheme for communicating large numbers of neural states between chips is proposed. The design of process independent pulse-firing neurons for use in networks and inter-chip communications are given.

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References

  • Baxter, D. J., Murray, A. F., and Reekie, H. M., Fully Cascadable Analogue Synapese Using Distributed Feedback, in this book.

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  • Murray, A. F., Brownlow, M., Hamilton, A., Han, II Song, Reekie, H. M., and Tarassenko, L., “Pulse-Firing Neural Chips for Hundreds of Neurons, ” Neural Information Processing Systems (NIPS) Conference,pp. 785–792, Morgan Kaufmann, 1990.

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  • Murray, A. F., Baxter, D., Butler, Z., Churcher, S., Hamilton, A., Reekie, H. M., and Tarassenko, L., “Innovations in Pulse Stream Neural VLSI: Arithmetic and Communications, ” IEEE Workshop on Microelectronics for Neural Networks, Dortmund, pp. 8–15, 1990.

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© 1991 Springer Science+Business Media New York

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Hamilton, A., Murray, A.F., Reekie, H.M., Tarassenko, L. (1991). Working Analogue Pulse-Firing Neural Network Chips. In: Delgado-Frias, J.G., Moore, W.R. (eds) VLSI for Artificial Intelligence and Neural Networks. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-3752-6_22

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  • DOI: https://doi.org/10.1007/978-1-4615-3752-6_22

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4613-6671-3

  • Online ISBN: 978-1-4615-3752-6

  • eBook Packages: Springer Book Archive

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