Abstract
As the seemingly simple and straightforward problem of weighted-sum computation was approached, its multiple facets started unfolding. Several optimization opportunities were identified in the area-delay-power space targeted to technologies ranging from programmable processors to hardwired implementations with or without a hardware multiplier. The algorithmic and architectural transformations presented in this book cover this entire solution space.
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© 2001 Springer Science+Business Media New York
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Mehendale, M., Sherlekar, S.D. (2001). Summary. In: VLSI Synthesis of DSP Kernels. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-3355-6_9
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DOI: https://doi.org/10.1007/978-1-4757-3355-6_9
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4419-4904-2
Online ISBN: 978-1-4757-3355-6
eBook Packages: Springer Book Archive