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A BIST Scheme for Non-Volatile Memories

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On-Line Testing for VLSI

Part of the book series: Frontiers in Electronic Testing ((FRET,volume 11))

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Abstract

A new BIST scheme for on-chip testing of non-volatile memories and based on signature analysis is presented. The signature of the whole memory, whose content can be changed selectively by the user, is dynamically self-learned by the memory and it is saved in a dedicated memory location. Either such a signature can be externally compared with the expected one in order to check for the programming operation, or it can be used for comparison purposes when data retention must be self-tested.

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References

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© 1998 Springer Science+Business Media New York

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Olivo, P., Dalpasso, M. (1998). A BIST Scheme for Non-Volatile Memories. In: Nicolaidis, M., Zorian, Y., Pradan, D.K. (eds) On-Line Testing for VLSI. Frontiers in Electronic Testing, vol 11. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-6069-9_13

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  • DOI: https://doi.org/10.1007/978-1-4757-6069-9_13

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4419-5033-8

  • Online ISBN: 978-1-4757-6069-9

  • eBook Packages: Springer Book Archive

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