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Disturbance Rejection Run-to-Run Controller for Semiconductor Manufacturing

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Computational Intelligence and Optimization Methods for Control Engineering

Part of the book series: Springer Optimization and Its Applications ((SOIA,volume 150))

Abstract

This chapter introduces a framework of disturbance rejection controller for discrete-time Run-to-Run (R2R) control system in semiconductor manufacturing environments. While we discussed the source of uncertainty and disturbance in wafer fabrication process, the photolithography process as one of the cutting-edge steps in wafer fabrication is selected for illustrating the power of disturbance rejection algorithm for compensating the misalignment. Along with this case study, some classification of disturbance rejection control algorithm with the structure of control plant is discussed.

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Notes

  1. 1.

    Static model: \(y_t = F(u_{t-1})\); Dynamic model: \(y_t = F(y_{t-1}, u_{t-1})\).

  2. 2.

    The surface of a wafer can be partitioned into smaller part for increase the accuracy of measurement the overlay error, each partition is called a field.

  3. 3.

    Regards to notation in the beginning of this section \(\mathbf x _t\) is equivalent to \(S_t\); \(\mathbf u _t\) is \(A_t\); \(\mathbf y _t\) is \(O_t\); \(P(\mathbf x _t|\mathbf x _{t-1},\mathbf u _{t-1})\) is \(R(S_{t}|S_{t-1}, A_{t-1})\); and \(E_t\) is \(R(S_t, A_t)\).

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Correspondence to Marzieh Khakifirooz .

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Khakifirooz, M., Fathi, M., Pardalos, P.M. (2019). Disturbance Rejection Run-to-Run Controller for Semiconductor Manufacturing. In: Blondin, M., Pardalos, P., Sanchis Sáez, J. (eds) Computational Intelligence and Optimization Methods for Control Engineering. Springer Optimization and Its Applications, vol 150. Springer, Cham. https://doi.org/10.1007/978-3-030-25446-9_13

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