Abstract
In this chapter we discuss Channel Hot Carrier (CHC) degradation in high-mobility SiGe and Ge channel pMOSFETs. For Si technologies this degradation mode is of relevance for n-channel devices, while it is often neglected for p-channel devices whose reliability is typically limited by Negative Bias Temperature Instability (NBTI). However, for Ge-based p-channel, hot carrier effects are expected to worsen due to higher hole mobility and reduced channel bandgap enhancing impact ionization.
We first discuss CHC degradation in Si pMOSFETs and compare it to NBTI degradation. We study the interplay of the two mechanisms and we show that CHC stress conditions (high gate and drain voltage) reduce the oxide electric field and in turn the NBTI degradation, and therefore do not constitute the worst degradation mode for Si p-channel devices.
In contrast to that, larger CHC degradation is found in SiGe and Ge pMOSFETs, eventually dominating over NBTI. For SiGe devices, a gate stack optimization which we have previously shown to minimize NBTI is found here to reduce also CHC degradation, ensuring sufficient reliability. Conversely, the reliability of pure Ge channel devices appears to be limited by CHC degradation. We discuss how junction engineering, and in particular halo implant optimization can enhance or mitigate CHC degradation and therefore has to be carefully considered for device reliability optimization.
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Franco, J., Kaczer, B. (2015). Channel Hot Carriers in SiGe and Ge pMOSFETs. In: Grasser, T. (eds) Hot Carrier Degradation in Semiconductor Devices. Springer, Cham. https://doi.org/10.1007/978-3-319-08994-2_9
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DOI: https://doi.org/10.1007/978-3-319-08994-2_9
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