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GPGPU Implementation of a Spiking Neuronal Circuit Performing Sparse Recoding

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Computational Intelligence Methods for Bioinformatics and Biostatistics (CIBB 2014)

Part of the book series: Lecture Notes in Computer Science ((LNBI,volume 8623))

Abstract

Modeling and simulation techniques have been used extensively to study the complexities of brain circuits. Simulations of bio-realistic networks consisting of large number of neurons require massive computational power when they are designed to provide real-time responses in millisecond scale. A network model of cerebellar granular layer was developed and simulated here on Graphic Processing Units (GPU) which delivered a high compute capacity at low cost. We used a mathematical model namely, Adaptive Exponential leaky integrate-and-fire (AdEx) equations to model the different types of neurons in the cerebellum. The hypothesis relating spatiotemporal information processing in the input layer of the cerebellum and its relations to sparse activation of cell clusters was evaluated. The main goal of this paper was to understand the computational efficiency and scalability issues while implementing a large-scale microcircuit consisting of millions of neurons and synapses. The results suggest efficient scale-up based on pleasantly parallel modes of operations allows simulations of large-scale spiking network models for cerebellum-like network circuits.

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Authors and Affiliations

  1. Amrita School of Biotechnology, Amrita Vishwa Vidyapeetham, Amrita University, Amritapuri, Kollam, Kerala, India

    Manjusha Nair, Bipin Nair & Shyam Diwakar

  2. Amrita School of Engineering, Amrita Vishwa Vidyapeetham, Amrita University, Amritapuri, Kollam, Kerala, India

    Manjusha Nair

Authors
  1. Manjusha Nair
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  2. Bipin Nair
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  3. Shyam Diwakar
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Corresponding author

Correspondence to Manjusha Nair .

Editor information

Editors and Affiliations

  1. CUSSB, University "Vita-Salute" San Raffae, Milano, Italy

    Clelia DI Serio

  2. The Computer Laboratory, University of Cambridge, Cambridge, United Kingdom

    Pietro Liò

  3. CUSSB, Università Vita-Salute San Raffaele, Milano, Italy

    Alessandro Nonis

  4. Dipartimento di Informatica, Universitá degli Studi di Salerno, Fisciano, Salerno, Italy

    Roberto Tagliaferri

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Nair, M., Nair, B., Diwakar, S. (2015). GPGPU Implementation of a Spiking Neuronal Circuit Performing Sparse Recoding. In: DI Serio, C., Liò, P., Nonis, A., Tagliaferri, R. (eds) Computational Intelligence Methods for Bioinformatics and Biostatistics. CIBB 2014. Lecture Notes in Computer Science(), vol 8623. Springer, Cham. https://doi.org/10.1007/978-3-319-24462-4_24

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  • DOI: https://doi.org/10.1007/978-3-319-24462-4_24

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-24461-7

  • Online ISBN: 978-3-319-24462-4

  • eBook Packages: Computer ScienceComputer Science (R0)

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