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A Hybrid FPGA Trojan Detection Technique Based-on Combinatorial Testing and On-chip Sensing

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Applied Reconfigurable Computing. Architectures, Tools, and Applications (ARC 2018)

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Abstract

A hybrid Hardware Trojan detection technique is proposed in this paper that combines Combinatorial Testing in order to consistently trigger the Hardware Trojan, if one is present, and a grid of compact on-chip sensors in order to detect differentiations in the circuit of the FPGA. Each sensor mainly consist of a three stage Ring Oscillator and a compact Residue Number System ring counter and requires just two FPGA slices, leading to a total overhead of less than 2% in hardware resources. The proposed technique was tested on a cryptographic module performing AES cipher. To emulate the effects of a Hardware Trojan, we used a 64-bit Linear Feedback Shift Register. The experimental results prove that the proposed hybrid technique can detect the presence of a Hardware Trojan.

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Acknowledgements

This work was co-financed by Greece and the European Union - European Regional Development Fund (NSRF/EPAnEK I3T-5002434).

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Authors and Affiliations

  1. Digital IC Design and Systems Laboratory (DICES Lab), Computer and Informatics Engineering Department, Technological Educational Institute of Western Greece, Antirrion, Greece

    Paris Kitsos

  2. Industrial Systems Institute of “Athena” RIC in ICT and Knowledge Technologies, Patras, Greece

    Lampros Pyrgas & Paris Kitsos

Authors
  1. Lampros Pyrgas
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  2. Paris Kitsos
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Corresponding author

Correspondence to Paris Kitsos .

Editor information

Editors and Affiliations

  1. Technological Educational Institute of Western Greece, Antirrio, Greece

    Nikolaos Voros

  2. Ruhr-Universität Bochum, Bochum, Germany

    Michael Huebner

  3. Technological Educational Institute of Western Greece, Antirrio, Greece

    Georgios Keramidas

  4. Technische Universität Dresden, Dresden, Germany

    Diana Goehringer

  5. Technological Educational Institute of Western Greece, Antirio, Greece

    Christos Antonopoulos

  6. INESC-ID, Lisbon, Portugal

    Pedro C. Diniz

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Pyrgas, L., Kitsos, P. (2018). A Hybrid FPGA Trojan Detection Technique Based-on Combinatorial Testing and On-chip Sensing. In: Voros, N., Huebner, M., Keramidas, G., Goehringer, D., Antonopoulos, C., Diniz, P. (eds) Applied Reconfigurable Computing. Architectures, Tools, and Applications. ARC 2018. Lecture Notes in Computer Science(), vol 10824. Springer, Cham. https://doi.org/10.1007/978-3-319-78890-6_24

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  • DOI: https://doi.org/10.1007/978-3-319-78890-6_24

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-78889-0

  • Online ISBN: 978-3-319-78890-6

  • eBook Packages: Computer ScienceComputer Science (R0)

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