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Topology-Oriented Design of Analog Circuits Based on Evolutionary Graph Generation

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Parallel Problem Solving from Nature - PPSN VIII (PPSN 2004)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 3242))

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Abstract

This paper presents an efficient graph-based evolutionary optimization technique called Evolutionary Graph Generation (EGG), and its application to the topology-oriented design of analog circuit structures. An important feature of EGG is its capability to optimize general graph structures directly instead of encoding the structures into indirect representations, such as bit strings and trees. The potential of the proposed approach is demonstrated through the experimental design of MOS current mirrors.

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References

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© 2004 Springer-Verlag Berlin Heidelberg

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Natsui, M., Homma, N., Aoki, T., Higuchi, T. (2004). Topology-Oriented Design of Analog Circuits Based on Evolutionary Graph Generation. In: Yao, X., et al. Parallel Problem Solving from Nature - PPSN VIII. PPSN 2004. Lecture Notes in Computer Science, vol 3242. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30217-9_35

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  • DOI: https://doi.org/10.1007/978-3-540-30217-9_35

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-23092-2

  • Online ISBN: 978-3-540-30217-9

  • eBook Packages: Springer Book Archive

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