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A Platform for Mixed HW/SW Algorithm Specifications for the Exploration of SW and HW Partitioning

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Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation (PATMOS 2007)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 4644))

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Abstract

The increasing complexity in particular of video and multimedia processing has lead to the need of developing the algorithms specification using software implementations that become in practice generic reference implementations. Mapping directly such software models in platforms made of processors and dedicated HW elements becomes harder and harder for the complexity of the models and for the large choice of possible partitioning options. This paper describes a new platform aiming at supporting the mapping of software specifications into mixed SW and HW implementations. The platform is supported by profiling capabilities specifically conceived to study data transfers between SW and HW modules. Such optimization capabilities can be used to achieve different objectives such as optimization of memory architectures or low power designs by the minimization of data transfers.

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References

  1. Annapolis Micro Systems, WILDCARD-II Reference Manual, 12968-000 Revision 2.6 (January 2004)

    Google Scholar 

  2. Koch, A.: A comprehensive prototyping-platform for hardware-software codesign. Rapid System Prototyping, 2000. In: RSP 2000 Proceedings. 11th International Workshop, 21-23 June, 2000, pp. 78–82 (2000)

    Google Scholar 

  3. Edwards, M., Fozard, B.: Rapid prototyping of mixed hardware and software systems. In: Digital System Design, 2002, Proceedings. Euromicro Symposium, 4-6 September, 2002, pp. 118–125 (2002)

    Google Scholar 

  4. Pradeep, R., Vinay, S., Burman, S., Kamakoti, V.: FPGA based agile algorithm-on-demand coprocessor, Design, Automation and Test in Europe 2005 (March 2005)

    Google Scholar 

  5. Plessl, C., Platzner, M.: TKDM - a reconfigurable co-processor in a PC’s memory slot. In: Field-Programmable Technology (FPT) Proceedings. 2003 IEEE International Conference, 15-17 December, 2003, pp. 252–259. IEEE Computer Society Press, Los Alamitos (2003)

    Chapter  Google Scholar 

  6. Sukhsawas, S., Benkrid, K., Crookes, D.: A reconfigurable high level FPGA-based coprocessor. In: Computer Architectures for Machine Perception, 2003 IEEE International Workshop, 12-16 May 2003, p. 4 (2003)

    Google Scholar 

  7. Schumacher, P., Mattavelli, M., Chirila-Rus, A., Turney, R.: A Virtual Socket Framework for Rapid Emulation of Video and Multimedia Designs. In: Multimedia and Expo, 2005 (ICME 2005) IEEE International Conference, 6-8 July, 2005, pp. 872–875 (2005)

    Google Scholar 

  8. Vuletic, M., Pozzi, L., Ienne, P.: Virtual memory window for application-specific reconfigurable coprocessors. In: Proceedings of the 41st Design Automation Conference, June 2004, San Diego, Calif (2004)

    Google Scholar 

  9. Amer, I., Rahman, C.A., Mohamed, T., Sayed, M., Badawy, W.: A hardware-accelerated framework with IP-blocks for application in MPEG-4. In: System-on-Chip for Real-Time Applications, Proceedings. Fifth International Workshop, 20-24 July, 2005, pp. 211–214 (2005)

    Google Scholar 

  10. Mohamed, T.S., Badawy, W.: Integrated hardware-software platform for image processing applications. In: System-on-Chip for Real-Time Applications, Proceedings. 4th IEEE International Workshop, IEEE Computer Society Press, Los Alamitos (2004)

    Google Scholar 

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Nadine Azémard Lars Svensson

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© 2007 Springer-Verlag Berlin Heidelberg

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Lucarz, C., Mattavelli, M. (2007). A Platform for Mixed HW/SW Algorithm Specifications for the Exploration of SW and HW Partitioning. In: Azémard, N., Svensson, L. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2007. Lecture Notes in Computer Science, vol 4644. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-74442-9_47

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  • DOI: https://doi.org/10.1007/978-3-540-74442-9_47

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-74441-2

  • Online ISBN: 978-3-540-74442-9

  • eBook Packages: Computer ScienceComputer Science (R0)

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