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FPGA-Based Real-Time Super-Resolution on an Adaptive Image Sensor

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Reconfigurable Computing: Architectures, Tools and Applications (ARC 2008)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 4943))

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Abstract

Recent technological advances in imaging industry have lead to the production of imaging systems with high density pixel sensors. However, their long exposure times limit their applications to static images due to the motion blur effect. This work presents a system that reduces the motion blurring using a time-variant image sensor. This sensor can combine several pixels together to form a larger pixel when it is necessary. Larger pixels require shorter exposure times and produce high frame-rate samples with reduced motion blur. An FPGA is employed to enhance the spatial resolution of these samples employing Super Resolution (SR) techniques in real-time. This work focuses on the spatial resolution enhancement block and presents an FPGA implementation of the Iterative Back Projection (IBP) SR algorithm. The proposed architecture achieves 25 fps for VGA input and can serve as a general purpose real-time resolution enhancement system.

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Roger Woods Katherine Compton Christos Bouganis Pedro C. Diniz

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© 2008 Springer-Verlag Berlin Heidelberg

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Angelopoulou, M.E., Bouganis, CS., Cheung, P.Y.K., Constantinides, G.A. (2008). FPGA-Based Real-Time Super-Resolution on an Adaptive Image Sensor. In: Woods, R., Compton, K., Bouganis, C., Diniz, P.C. (eds) Reconfigurable Computing: Architectures, Tools and Applications. ARC 2008. Lecture Notes in Computer Science, vol 4943. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-78610-8_14

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  • DOI: https://doi.org/10.1007/978-3-540-78610-8_14

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-78609-2

  • Online ISBN: 978-3-540-78610-8

  • eBook Packages: Computer ScienceComputer Science (R0)

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