Abstract
Ultralow-power design has been a main challenge in modern VLSI circuits. This paper explores the near-threshold computing of adiabatic circuits. The characteristic of energy dissipations of the ECRL (efficient charge recovery logic) circuits is analyzed. It is found that its energy consumption is dependent linearly on operating voltage. In the near-threshold region, the ECRL circuits obtain considerable energy savings with a little performance penalty. An 8-bit ECRL Kogge-Stone adder is realized and simulated using HSPICE at a 45nm process with the NCSU PTM model. Simulations show that the power consumption of the near-threshold ECRL Kogge-Stone adder is reduced about 50% compared with the super-threshold one for clock rates ranging from 50MHz to 1.0 GHz.
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Wu, Y., Chen, J., Hu, J. (2011). Near-Threshold Computing of ECRL Circuits for Ultralow-Power Applications. In: Lee, J. (eds) Advanced Electrical and Electronics Engineering. Lecture Notes in Electrical Engineering, vol 87. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-19712-3_27
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DOI: https://doi.org/10.1007/978-3-642-19712-3_27
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-19711-6
Online ISBN: 978-3-642-19712-3
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