Short-Channel Effects in MOSFETs

Abstract

Short-channel effects are a series of phenomena that take place when the channel length of the MOSFET becomes approximately equal to the space charge regions of source and drain junctions with the substrate. They lead to a series of issues including polysilicon gate depletion effect , threshold voltage roll-off , drain-induced barrier lowering (DIBL) , velocity saturation , reverse leakage current rise, mobility reduction, hot carrier effects , and similar other annoyances. Mitigation of the problem posed by polysilicon gate depletion effect via restoration of metal gate structure is presented. Threshold voltage reduction makes it difficult to turn the transistor off completely. By DIBL effect, electrostatic coupling between the source and drain makes the gate ineffective. Velocity saturation decreases the current drive. The leakage current increases the power dissipation. Enhanced surface scattering degrades the mobility of charge carriers affecting the output current. Apart from these factors, impact ionization and hot carrier effects seriously impair the MOSFET performance and cause the device to diverge in behavior from long-channel ones. Notable solutions are the gate oxide thickness cutback, use of high-κ dielectrics, strain engineering, etc. Nevertheless, the various effects mentioned severely downgrade the performance of planar CMOS transistors at process nodes <90 nm.

Review Exercises

• 5.1 When is a MOSFET channel said to be: (i) long, and (ii) short? Can a short channel be avoided during miniaturization of MOSFET?

• 5.2 What is polysilicon depletion effect? Up to what extent doping elevation can obviate this effect? Can it be avoided by using metal gates?

• 5.3 Do source and drain junctions play any role in depleting the MOSFET substrate? In what way does this contribution of source and drain junctions change in a short-channel device? What is threshold voltage roll-off?

• 5.4 Why is the threshold voltage of a long-channel MOSFET independent of drain voltage but this is not so in a short-channel device?

• 5.5 Explain drain-induced barrier lowering in a MOSFET. What is the effect on threshold voltage of the device?

• 5.6 How does the threshold voltage reduction in a short-channel MOSFET differ for source/substrate and drain/substrate junctions, which are: (i) deep, and (ii) shallow?

• 5.7 At high drain voltages, the source and drain junctions may touch each other. What is this phenomenon called? How is the voltage at which this phenomenon occurs related with the channel length of MOSFET?

• 5.8 What is velocity saturation? What is its effect on the current drive of a MOSFET?

• 5.9 Write the Caughey-Thomas equations for the dependence of mobility on electric field.

• 5.10 How are the contributions of bulk and surface effects in mobility of carriers in a MOSFET inversion layer expressed by Matthiesen’s rule ?

• 5.11 How is impact ionization produced in a MOSFET at high drain voltages? How the parasitic bipolar transistor makes the situation worse?

• 5.12 What is a hot carrier? Describe the different hot carrier effects in a MOSFET.

• 5.13 How is leakage through gate oxide avoided by using a high-κ dielectric ? What is equivalent oxide thickness?

• 5.14 Write the equation relating the equivalent oxide thickness with thickness of high-k dielectric.

• 5.15 How does straining the silicon lattice increase the carrier mobility? Briefly explain the dual-stress liner approach.

• 5.16 How do the following structures help in avoiding hot carrier effects? (i) light-doped drain, and (ii) double-diffused MOSFET ?