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Models for Bridging Defects

Test and Diagnosis

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Models in Hardware Testing

Part of the book series: Frontiers in Electronic Testing ((FRET,volume 43))

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Abstract

Bridging defects are responsible for a large percentage of failures in CMOS technologies and their impact in nanometer technologies with highly dense interconnect structures is expected to increase. In this chapter, a survey of the key developments in modeling bridging defects and their implications in test and diagnosis are presented. An overview of the historical developments of these models from the “wired AND/OR” and “voting” models to more realistic proposals taking into consideration the resistance values of the bridge are presented. The logic detectability of bridging defects considering the resistance of the bridge assuring its detectability is explored. The concept of Analogue Detectability Interval (ADI) as well as its applicability to increase the quality of the vectors detecting these defect classes is introduced. Quality of electronic circuits and systems requires the availability of effective diagnosis techniques. The basic concepts of logic as well as current-based (IDDQ) diagnostic strategies are included in this chapter.

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Correspondence to Michel Renovell .

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Renovell, M., Azais, F., Figueras, J., Rodríguez-Montañés, R., Arumí, D. (2010). Models for Bridging Defects. In: Wunderlich, HJ. (eds) Models in Hardware Testing. Frontiers in Electronic Testing, vol 43. Springer, Dordrecht. https://doi.org/10.1007/978-90-481-3282-9_2

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