Skip to main content
SpringerLink
Log in

WCC—WCET-Aware C Compiler

  • Chapter
Worst-Case Execution Time Aware Compilation Techniques for Real-Time Systems

Part of the book series: Embedded Systems ((EMSY))

  • 1055 Accesses

Abstract

In this chapter, the utilized compiler framework is discussed. The chapter begins with an overview of work to existing frameworks that integrate WCET analyses into the compilation process. The basic workflow of the utilized WCET-aware C compiler WCC, which is similar to standard optimizing compilers, is presented to provide the reader with an overall overview of the WCET-aware compilation flow. Moreover, the integration of a static WCET analyzer into the compiler framework is discussed. In addition, a static loop analysis, which was developed in this work to enable an automatic WCET analysis, is presented. To exploit optimization potential for WCET minimization at source code level, WCET timing data has to be translated from the compiler’s backend into its frontend. This technique, which was developed in this work, is called back-annotation and will be introduced in this chapter. Finally, an overview of WCC’s target architecture, the Infineon TriCore processor, concludes this chapter.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Log in via an institution
Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 129.00
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 169.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 169.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

References

  1. A.V. Aho, R. Sethi, J.D. Ullman, Compilers: Principles, Techniques, and Tools (Addison-Wesley/Longman, Boston, 1986)

    Google Scholar 

  2. ARM7TDMI-S (Revision 4), Technical Reference Manual. ARM Limited, September 2001

    Google Scholar 

  3. D.F. Bacon, S.L. Graham, O.J. Sharp, Compiler transformations for high-performance computing. ACM Comput. Surv. 26(4), 345–420 (1994)

    Article  Google Scholar 

  4. S. Bates, S. Horwitz, Incremental program testing using program dependence graphs, in Proceedings of the 20th ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages (POPL), Charleston, USA, January 1993, pp. 384–396

    Google Scholar 

  5. H. Börjesson, Incorporating worst case execution time in a commercial C-compiler, Master’s thesis, Uppsala University, January 1996

    Google Scholar 

  6. P. Briggs, Register allocation via graph coloring, PhD thesis, Rice University, Houston, USA, 1992

    Google Scholar 

  7. J. Cavazos, G. Fursin, F. Agakov et al., Rapidly selecting good compiler optimizations using performance counters, in Proceedings of the International Symposium on Code Generation and Optimization (CGO), San Jose, USA, March 2007, pp. 185–197

    Google Scholar 

  8. A. Colin, I. Puaut, A modular & retargetable framework for tree-based WCET analysis, in Proceedings of the 13th Euromicro Conference on Real-Time Systems (ECRTS), Delft, The Netherlands, June 2001, pp. 37–44

    Google Scholar 

  9. K.D. Cooper, L. Torczon, Engineering A Compiler (Morgan Kaufmann, San Francisco, 2004)

    Google Scholar 

  10. K.D. Cooper, P.J. Schielke, D. Subramanian, Optimizing for reduced code space using genetic algorithms. ACM SIGPLAN Not. 34(7), 1–9 (1999)

    Article  Google Scholar 

  11. D. Cordes, Loop analysis for a WCET-optimizing compiler based on abstract interpretation and polylib (in German), Diploma thesis, TU Dortmund University, April 2008

    Google Scholar 

  12. P. Cousot, R. Cousot, Abstract interpretation: a unified lattice model for static analysis of programs by construction or approximation of fixpoints, in Proceedings of the 4th ACM SIGACT-SIGPLAN Symposium on Principles of Programming Languages (POPL), Los Angeles, USA, January 1977, pp. 238–252

    Google Scholar 

  13. C. Cullmann, F. Martin, Data-flow based detection of loop bounds, in Proceedings of the 7th International Workshop on Worst-Case Execution Time (WCET), Pisa, Italy, July 2007, pp. 57–62

    Google Scholar 

  14. D. Elsner, J. Fenlason, Using as—The GNU Assembler. Free Software Foundation (1994)

    Google Scholar 

  15. A. Ermedahl, A modular tool architecture for worst-case execution time analysis, PhD thesis, Uppsala University, 2003

    Google Scholar 

  16. A. Ermedahl, J. Gustafsson, Deriving annotations for tight calculation of execution time, in Proceedings of the 3rd International Euro-Par Conference on Parallel Processing (Euro-Par), Passau, Germany, August 1997, pp. 1298–1307

    Google Scholar 

  17. A. Ermedahl, C. Sandberg, J. Gustafsson et al., Loop bound analysis based on a combination of program slicing, abstract interpretation, and invariant analysis, in Proceedings of the 7th International Workshop on Worst-Case Execution Time Analysis (WCET), Pisa, Italy, July 2007, pp. 63–68

    Google Scholar 

  18. H. Falk, J.C. Kleinsorge, Optimal static WCET-aware scratchpad allocation of program code, in Proceedings of the 46th Design Automation Conference (DAC), San Francisco, USA, July 2009, pp. 732–737

    Google Scholar 

  19. H. Falk, P. Marwedel, Control flow driven splitting of loop nests at the source code level, in Proceedings of the Conference on Design, Automation and Test in Europe (DATE), Munich, Germany, March 2003, pp. 410–415

    Google Scholar 

  20. H. Falk, P. Lokuciejewski, H. Theiling, Design of a WCET-aware C compiler, in Proceedings of the 2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia (ESTIMedia), Seoul, Korea, October 2006, pp. 121–126

    Google Scholar 

  21. H. Falk, P. Lokuciejewski, H. Theiling, Design of a WCET-aware C compiler, in Proceedings of the 6th International Workshop on Worst-Case Execution Time Analysis (WCET), Dresden, Germany, June 2006

    Google Scholar 

  22. J. Ferrante, K.J. Ottenstein, J.D. Warren, The program dependence graph and its use in optimization. ACM Trans. Program. Lang. Syst. 9(3), 319–349 (1987)

    Article  MATH  Google Scholar 

  23. C.W. Fraser, R.R. Henry, T.A. Proebsting, BURG: fast optimal instruction selection and tree parsing. SIGPLAN Not. 27(4), 68–76 (1992)

    Article  Google Scholar 

  24. J. Gustafsson, A. Ermedahl, C. Sandberg et al., Automatic derivation of loop bounds and infeasible paths for WCET analysis using abstract execution, in The 27th IEEE Real-Time Systems Symposium (RTSS 2006), Rio de Janeiro, Brazil, December 2006, pp. 57–66

    Google Scholar 

  25. M. Guthaus, J. Ringenberg, D. Ernst et al., MiBench: a free, commercially representative embedded benchmark suite, in Proceedings of the 4th IEEE International Workshop on Workload Characteristics (WWC), Austin, USA, December 2001, pp. 3–14

    Google Scholar 

  26. C. Healy, M. Sjödin, V. Rustagi et al., Bounding loop iterations for timing analysis, in Proceedings of the 4th IEEE Real-Time Technology and Applications Symposium (RTAS), Denver, USA, June 1998, pp. 12–21

    Google Scholar 

  27. HighTec EDV-Systeme GmbH. TriCore PXROS-HR Development Platform, http://www.hightec-rt.com, March 2010

  28. N. Holsti, J. Gustafsson, G. Bernat, C. Ballabriga, A. Bonenfant, R. Bourgade, H. Cassi, D. Cordes, A. Kadlec, R. Kirner, J. Knoop, P. Lokuciejewski, N. Merriam, M. de Michiel, A. Prantl, B. Rieder, C. Rochange, M. Sainrat, P. Schordan, WCET Tool Challenge 2008: Report, in Proceedings of the 8th International Workshop on Worst-Case Execution Time Analysis (WCET), Prague, Czech Republic, July 2008

    Google Scholar 

  29. S. Horwitz, T. Reps, D. Binkley, Interprocedural slicing using dependence graphs, in Proceedings of the ACM SIGPLAN 1988 Conference on Programming Language Design and Implementation (PLDI), Atlanta, USA, June 1988, pp. 35–46

    Google Scholar 

  30. Informatik Centrum Dortmund. ICD-C Compiler framework, http://www.icd.de/es/icd-c, March 2010

  31. Informatik Centrum Dortmund. ICD low level intermediate representation backend infrastructure (LLIR)—developer manual. Informatik Centrum Dortmund, March 2010

    Google Scholar 

  32. R. Kirner, The programming language wcetC, Technical report, Technische Universität Wien, Institut für Technische Informatik, 2002

    Google Scholar 

  33. M. Kirner, Automatic loop bound analysis of programs written in C, Master’s thesis, Technische Universität Wien, December 2006

    Google Scholar 

  34. J. Kleinsorge, WCET-centric code allocation for scratchpad memories, Diploma thesis, TU Dortmund University, September 2008

    Google Scholar 

  35. H. Leather, M. O’Boyle, B. Worton, Raced profiles: efficient selection of competing compiler optimizations, in Proceedings of the ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), Dublin, Ireland, June 2009, pp. 50–59

    Google Scholar 

  36. C. Lee, M. Potkonjak, W.H. Mangione-Smith, MediaBench: a tool for evaluating and synthesizing multimedia and communications systems, in Proceedings of the 30th Annual International Symposium on Microarchitecture (MICRO), Research Triangle Park, USA, December 1997, pp. 330–335

    Google Scholar 

  37. T. Lengauer, R.E. Tarjan, A fast algorithm for finding dominators in a flowgraph. ACM Trans. Program. Lang. Syst. 1(1), 121–141 (1979)

    Article  MATH  Google Scholar 

  38. X. Li, Y. Liang, T. Mitra et al., Chronos: a timing analyzer for embedded software. Sci. Comput. Program. 69(1–3), 56–67 (2007)

    Article  MathSciNet  MATH  Google Scholar 

  39. Y. Liang, L. Ju, S. Chakraborty et al., Cache-aware optimization of BAN applications. ACM Trans. Des. Automat. Electron. Syst. (2010)

    Google Scholar 

  40. P. Lokuciejewski, Design and realization of concepts for WCET compiler optimization, Diploma thesis, TU Dortmund University, December 2005

    Google Scholar 

  41. P. Lokuciejewski, D. Cordes, H. Falk, P. Marwedel, A fast and precise static loop analysis based on abstract interpretation, program slicing and polytope models, in Proceedings of the International Symposium on Code Generation and Optimization (CGO), Seattle, USA, March 2009, pp. 136–146

    Google Scholar 

  42. J.R. Lyle, M.D. Weiser, Automatic program bug location by program slicing, in Proceedings of International Conference on Computers and Applications, Peking, China, February 1987, pp. 877–882

    Google Scholar 

  43. Mälardalen WCET Research Group. WCET Benchmarks, http://www.mrtc.mdh.se/projects/wcet, March 2010

  44. S.S. Muchnick, Advanced Compiler Design and Implementation (Morgan Kaufmann, San Francisco, 1997)

    Google Scholar 

  45. K.J. Ottenstein, L.M. Ottenstein, The program dependence graph in a software development environment. SIGSOFT Softw. Eng. Not. 9(3), 177–184 (1984)

    Article  Google Scholar 

  46. S. Plazar, P. Lokuciejewski, P. Marwedel, A retargetable framework for multi-objective WCET-aware high-level compiler optimizations, in Proceedings of the 29th IEEE Real-Time Systems Symposium WiP (RTSS), Barcelona, Spain, December 2008, pp. 49–52

    Google Scholar 

  47. A. Prantl, M. Schordan, J. Knoop, TuBound—a conceptually new tool for worst-case execution time analysis, in Proceedings of the 8th International Workshop on Worst-Case Execution Time Analysis (WCET), Prague, Czech Republik, July 2008

    Google Scholar 

  48. I. Puaut, WCET-centric software-controlled instruction caches for hard real-time systems, in Proceedings of the 18th Euromicro Conference on Real-Time Systems (ECRTS), Dresden, Germany, July 2006, pp. 217–226

    Google Scholar 

  49. T. Reps, G. Rosay, Precise interprocedural chopping, in Proceedings of the 3rd ACM SIGSOFT Symposium on Foundations of Software Engineering (SIGSOFT), Washington, USA, October 1995, pp. 41–52

    Google Scholar 

  50. C. Sandberg, A. Ermedahl, J. Gustafsson, B. Lisper, Faster WCET flow analysis by program slicing. SIGPLAN Not. 41(7), 103–112 (2006)

    Article  Google Scholar 

  51. H. Schildt, C/C++ Programmer’s Reference (McGraw-Hill, New York, 2000)

    Google Scholar 

  52. D. Schulte, Modeling and transformation of flow facts within a WCET optimizing compiler, Diploma thesis, TU Dortmund University, May 2007

    Google Scholar 

  53. M.D. Smith, Overcoming the challenges to feedback-directed optimization, in Proceedings of the ACM SIGPLAN Workshop on Dynamic and Adaptive Compilation and Optimization (DYNAMO), Boston, USA, January 2000, pp. 1–11

    Google Scholar 

  54. V. Suhendra, T. Mitra, A. Roychoudhury et al., WCET centric data allocation to scratchpad memory, in Proceedings of the 26th IEEE International Real-Time Systems Symposium (RTSS), Miami, USA, December 2005, pp. 223–232

    Google Scholar 

  55. Tc1796 32-bit single-chip microcontroller tricore—data sheet. Infineon Technologies AG, Document Revision 2008-04 (2008)

    Google Scholar 

  56. H. Theiling, Extracting safe and precise control flow from binaries, in Proceedings of the Seventh International Conference on Real-Time Systems and Applications (RTCSA), Cheju Island, South Korea, December 2000, pp. 23–30

    Google Scholar 

  57. H. Theiling, Control flow graphs for real-time systems analysis, PhD thesis, Saarland University, 2002

    Google Scholar 

  58. TriCore 1 32-bit unified processor core v1.3 architecture—architecture manual. Infineon Technologies AG, Document Revision 2008-01 (2008)

    Google Scholar 

  59. UTDSP Benchmark Suite. http://www.eecg.toronto.edu/~corinna/DSP/infrastructure/UTDSP.html, March 2010

  60. S. Verdoolaege, Barvinok, http://www.kotnet.org/~skimo/barvinok, September 2009

  61. S. Verdoolaege, R. Seghir, K. Beyls et al., Analytical computation of Ehrhart polynomials: enabling more compiler analyses and optimizations, in Proceedings of the 2004 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), Washington, USA, September 2004, pp. 248–258

    Google Scholar 

  62. M.D. Weiser, Program slices: formal, psychological, and practical investigations of an automatic program abstraction method, PhD thesis, University of Michigan, Ann Arbor, USA, 1979

    Google Scholar 

  63. W. Zhao, W. Kreahling, D. Whalley et al., Improving WCET by optimizing worst-case paths, in Proceedings of the 11th IEEE Real Time on Embedded Technology and Applications Symposium (RTAS), San Francisco, USA, March 2005, pp. 138–147

    Google Scholar 

  64. W. Zhao, P. Kulkarni, D. Whalley et al., Tuning the WCET of embedded applications, in Proceedings of the 10th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), Toronto, Canada, May 2004, pp. 472–481

    Google Scholar 

  65. V. Zivojnović, J. Martínez Velarde, C. Schläger et al., DSPstone: a DSP-oriented benchmarking methodology, in Proceedings of the International Conference on Signal Processing and Technology (ICSPAT), Dallas, USA, January 1994, pp. 715–720

    Google Scholar 

Download references

Author information

Authors and Affiliations

  1. Suitbertusstr. 34, 40223, Düsseldorf, Germany

    Paul Lokuciejewski

  2. Embedded Systems Group, TU Dortmund University, Otto-Hahn-Str. 16, 44221, Dortmund, Germany

    Peter Marwedel

Authors
  1. Paul Lokuciejewski
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Peter Marwedel
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Paul Lokuciejewski .

Rights and permissions

Reprints and permissions

Copyright information

© 2011 Springer Science+Business Media B.V.

About this chapter

Cite this chapter

Lokuciejewski, P., Marwedel, P. (2011). WCC—WCET-Aware C Compiler. In: Worst-Case Execution Time Aware Compilation Techniques for Real-Time Systems. Embedded Systems. Springer, Dordrecht. https://doi.org/10.1007/978-90-481-9929-7_3

Download citation

  • DOI: https://doi.org/10.1007/978-90-481-9929-7_3

  • Publisher Name: Springer, Dordrecht

  • Print ISBN: 978-90-481-9928-0

  • Online ISBN: 978-90-481-9929-7

  • eBook Packages: EngineeringEngineering (R0)

Publish with us

Policies and ethics

Search

Navigation