Abstract
In recent days, through silicon via (TSV) become a promising technology for integrated circuit packaging. The structure of the TSV composed of copper, insulating liner, and silicon substrate. The TSV is enclosed using insulating liner to troubleshoot the leakage in signal from copper (Cu) to silicon (Si) substrate. In the existing TSV structures, silicon dioxide (SiO2) dielectric is used as insulation liner because of its material compatibility with the silicon substrate. On the other hand, several researchers were reported the problems of SiO2. Due to the high dielectric constant of SiO2, the insulating capacitance increases that result in increasing of delay. Therefore, SiO2 is not suitable for high-performance applications. To alleviate the insulating capacitance, polymer liner is used rather than SiO2. A proposed novel TSV structure consists of the signal TSV is encompassed by utilizing the poly-propylene liner. For comparison purpose, we perform the simulations for both conventional and proposed TSV structures by varying different design parameters of TSV. It has been observed that the proposed TSV structure shows 25% decrease in crosstalk compared to conventional TSV structures.
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Acknowledgements
The authors would like to thank Science and Engineering Research Board (SERB), DST, Government of India for the financial support of the project file number ECR/2016/001070.
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Ganimidi, M., Ramesh Kumar, V. (2018). Design of Novel Through Silicon via Structures for Reduced Crosstalk Effects in 3D IC Applications. In: Singh, R., Choudhury, S., Gehlot, A. (eds) Intelligent Communication, Control and Devices. Advances in Intelligent Systems and Computing, vol 624. Springer, Singapore. https://doi.org/10.1007/978-981-10-5903-2_61
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DOI: https://doi.org/10.1007/978-981-10-5903-2_61
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