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Taxonomy of Decimal Multiplier Research

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Algorithms and Applications

Part of the book series: Smart Innovation, Systems and Technologies ((SIST,volume 88))

Abstract

Decimal arithmetic hardware research accelerated in the last decade with introduction of decimal floating point formats in “IEEE 754-2008” standards. During the revision phase (IEEE 754R), 2000–2008, global research on decimal arithmetic witnessed state-of-the-art decimal hardware proposals as well as software routines for decimal computations on general-purpose microprocessors. Multiplication forms a fundamental arithmetic operation and an integral part of arithmetic hardware units. This paper provides taxonomy of the major contributions in decimal multiplier research.

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Authors and Affiliations

  1. Techno India-Batanagar, Kolkata, India

    Diganta Sengupta

  2. Techno India College of Technology, Kolkata, India

    Mahamuda Sultana

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  1. Diganta Sengupta
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  2. Mahamuda Sultana
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Correspondence to Diganta Sengupta .

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Editors and Affiliations

  1. Department of Computer Science, Missouri University of Science and Technology, Rolla, Missouri, USA

    Sajal K. Das

  2. Department of Computer Science and Engineering, University of Calcutta, Kolkata, West Bengal, India

    Nabendu Chaki

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Sengupta, D., Sultana, M. (2018). Taxonomy of Decimal Multiplier Research. In: Das, S., Chaki, N. (eds) Algorithms and Applications . Smart Innovation, Systems and Technologies, vol 88. Springer, Singapore. https://doi.org/10.1007/978-981-10-8102-6_1

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  • DOI: https://doi.org/10.1007/978-981-10-8102-6_1

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