Abstract
In this paper, tunneling current in nanoscale MOSFET is analytically investigated using BSIM4 model for very low power VLSI applications. Simulation is carried out for low and high electric fields separately, and appropriate mathematical equations are formulated for that purpose by modifying the existing model proposed by Hu. Effect of dielectric thickness and internally generated electrical parameter variations are measured on tunneling current. Diode-like behavior under the application of high field speaks about the magnitude of critical field where thermionic current starts to dominate. Results are critically important for non-volatile memory applications.
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Chowdhury, A.R., Roy, K., Saha, P., Deyasi, A. (2018). Analytical Investigation of Tunneling Current in Nano-MOSFET Using BSIM4 Model for Low Power VLSI Applications. In: Mandal, J., Sinha, D. (eds) Social Transformation – Digital Way. CSI 2018. Communications in Computer and Information Science, vol 836. Springer, Singapore. https://doi.org/10.1007/978-981-13-1343-1_2
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DOI: https://doi.org/10.1007/978-981-13-1343-1_2
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