Abstract
As a standard display interface, VGA (Video Graphics Array) has been widely used. In this paper, we propose an independent VGA controller, and the CPU (Central Processing Unit) does not need to control and transmit data, which can save hardware resource and enhance data processing speed, compared to the regular VGA design. Specifically, the controller consists of a synchronizing module, a memory module, and a palette module. We implement three pixel-mapped schemes, including bit-mapped scheme, block-mapped and object-mapped scheme, compared with the traditional mapping scheme. Their signal activities are 5.00 \(\times \) \(10^7\), 1.67 \(\times \) \(10^7\), 3.33 \(\times \) \(10^7\) and 5.67 \(\times \) \(10^7\) respectively which measure the display efficiency of the VGA controller. Their synthesized registers are 2348, 2412, 2560 and 2072, which reflect different resource utilization. Our functional simulations and logic syntheses prove that the proposed VGA controller design has strong flexibility, short design cycle, and low production cost under the provided circumstances of application.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
Tormo, D., Monmasson, E., Idkhajine, L., Blasco-Gimenez, R.: Embedded real-time simulator implementations of electromechanical systems using system-on-chip devices. In: Electrimacs (2017). https://hal.archives-ouvertes.fr/hal-01799852
Perez, K.G., Yang, X., Scott-Hayward, S., Sezer, S.: Feature study on a programmable network traffic classifier. In: IEEE International System-On-Chip Conference, pp. 108–113 (2017). https://doi.org/10.1109/socc.2016.7905446
Luo, Z.J., Zhang, W.N., Liu, L.W., Xie, S.T., Zhou, G.F.: Portable multi-gray scale video playing scheme for high-performance electrowetting displays. J. Soc. Inf. Disp. 24(6), 345–354 (2016). https://doi.org/10.1002/jsid.444
Pfeifle, F.: Real-time signal processing on field programmable gate array hardware. In: Bader, R. (ed.) Springer Handbook of Systematic Musicology. SH, pp. 385–417. Springer, Heidelberg (2018). https://doi.org/10.1007/978-3-662-55004-5_20
Zhang, Y., Lu, K., Gao, Y.: Fast image matching algorithm based on affine invariants. J. Cent. South Univ. 21(5), 1907–1918 (2014). https://doi.org/10.1007/s11771-014-2137-7
Zhang, H.B., Pan, J.C., Zeng, D.J.: Video graphics array interface switch apparatus. US, US8321621B2 (2012)
Hu, H.: Testing sysytem and method for video graphics array port, US, US20140244195 (2014)
Gurevich, K.L.: Apparatus and methods for video graphics array (VGA) virtualization in system exploiting multiple operating systems, US, US20060036775 (2006)
Zhao, T., Li, T., Han, B., Sun, Z., Huang, J.: Design and implementation of software defined hardware counters for SDN. Comput. Netw. 102, 129–144 (2016). https://doi.org/10.1016/j.comnet.2016.03.004
Tissot, J.L., Tinnes, S., Durand, A., Minassian, C., Robert, P., Vilain, M., Yon, J.: High-performance uncooled amorphous silicon video graphics array and extended graphics array infrared focal plane arrays with 17-\({\upmu }\)m pixel pitch. Opt. Eng. 50(60), 409–421 (2011). https://doi.org/10.1117/1.3572155
Endoh, T., Tsutomu, S., Yamazaki, T., et al.: Uncooled infrared detector with 12\({\upmu }\)m pixel pitch video graphics array. In: Infrared Technology and Applications XXXIX International Society for Optics and Photonics (2013). https://doi.org/10.1117/12.2013690
Waldvogel, B., Schulz, H., Behnke, S.: Dense real-time mapping of object-class semantics from RGB-D video. J. Real-Time Image Process. 10(4), 599–609 (2015)
Kim, I.H., Choi, J.S., Yun, J.L., Nam, J.Y., Ha, Y.H.: Design and implementation of multimedia functional module for digital TV. IEEE Trans. Consum. Electron. 50(3), 962–967 (2004). https://doi.org/10.1109/tce.2004.1341707
Sivasathya, S.: Design of VGA monitor controller in FPGA using on chip embedded array RAM. Int. J. Technol. Eng. Syst. 6(1), 27–31 (2004). https://www.ijcns.com
Bharathi, M., Yogananth, A.: Design of VGA monitor control using Altera FPGA based system. Int. J. VLSI Embed. Syst. 5, 866–890 (2014). http://ijves.com
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2019 Springer Nature Singapore Pte Ltd.
About this paper
Cite this paper
Li, Z., Jiang, Y., Guo, Y. (2019). An Independent VGA Controller Based on SOPC with Three Pixel-Mapped Schemes. In: Xu, W., Xiao, L., Li, J., Zhu, Z. (eds) Computer Engineering and Technology. NCCET 2018. Communications in Computer and Information Science, vol 994. Springer, Singapore. https://doi.org/10.1007/978-981-13-5919-4_2
Download citation
DOI: https://doi.org/10.1007/978-981-13-5919-4_2
Published:
Publisher Name: Springer, Singapore
Print ISBN: 978-981-13-5918-7
Online ISBN: 978-981-13-5919-4
eBook Packages: Computer ScienceComputer Science (R0)
