Abstract
We give implementations for atomic, shared, asynchronous, wait-free registers: (i) A new implemenfation of an atomic, 1-writer, 1-reader, b-bit register from O (b) safe, boolean registers (i.e., from scratch). The solution uses neither repeated writing of the input nor repeated reading of the output. (ii) An implementation of an atomic, 1-writer, n-reader, multibit register from O(n 2) atomic, 1-writer, 1-reader, multibit registers. Both constructions rely on the same idea. In a sense (ii) is a generalization of (i). These results show how to construct atomic, multireader registers from — basically — elementary hardware like flip-flops.
The work of the third author was supported in part by the Office of Naval Research under Contract N00014-85-K-0168, by the Office of Army Research under Contract DAAG29-84-K-0058, by the National Science Foundation under Grant DCR-83-02391, and by the Defence Advanced Research Projects Agency (DARPA) under Contract N00014-83-K-0125.
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References
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© 1988 Springer-Verlag Berlin Heidelberg
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Kirousis, L.M., Kranakis, E., Vitányi, P.M.B. (1988). Atomic multireader register. In: van Leeuwen, J. (eds) Distributed Algorithms. WDAG 1987. Lecture Notes in Computer Science, vol 312. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0019809
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DOI: https://doi.org/10.1007/BFb0019809
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